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|A survey and taxonomy of layout compaction algorithms
|Anido, Manuel Lois
Oliveira, Carlo Emmanoel Tolla de
|This paper presents a survey and a taxonomy of layout compaction algorithms, which are an essential part of modern symbolic layout tools employed in VLSI circuit design. Layout compaction techniques are also used in the low-end stages of silicon compilation tools and module generators. The paper addresses the main algorithms used in compaction, focusing on their implementation characteristics, performance, advantages and drawbacks. Compaction is a highly important operation to optimize the use of silicon area, achieve higher speed through wire length minimization, support technology retargeting and also allow the use of legacy layouts. Optimized cells that were developed for a fabrication process with a set of design rules have to be retargeted for a new and more compact process with a different set of design rules.
|Compactação de algoritmos
VLSI (Integração em larga escala)
|CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO
|Instituto Tércio Pacitti de Aplicações e Pesquisas Computacionais
|Relatório Técnico NCE
|ANIDO, M. L.; OLIVEIRA, C. E. T. A survey and taxonomy of layout compaction algorithms. Rio de Janeiro: NCE/UFRJ, 2000. 25 p. (Relatório Técnico, 16/00)
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